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Electronics -> Memorybrick SRAM/NVRAM/FLASH/EEPROM programmer

Last modified on Sat, 4th Oct 2008 at 13:55 UTC by zipplet

Click to enlarge

Note this picture is of the very early R1 before I added the DIP switches to swap the signals necessary for flash programming to work!
A second revision will remove the need for the DIP switches.

What is it?

Memorybrick is a general-purpose memory chip programmer and tester that connects to the USB port. It is bus powered, and the PIC18F2550 microcontroller is at the heart of the device.

When it is finished (I'm still working on the firmware) it will be capable of reading/writing/erasing/testing at least the following devices:

Static RAM from 8KB -> 512KB (JEDEC standard pinout, 28-32 pins)
ST ZEROPOWER/TIMEKEEPER RAM chips (as they are JEDEC standard!)
Standard mask ROMs can be read - e.g. BBC micro OS ROM, NES game cart ROMs
5V DIP FLASH chips e.g. 29F002 / 29F040
Microchip SPI serial EEPROMs 1kbit -> 1mbit e.g. 25AA1024
Microchip I2C serial EEPROMs
Atmel custom protocol serial EEPROMs 1kbit -> 1mbit e.g. AT24C02
An auxillary port for adding daughter boards to program other devices, for example DS game card saves.
Special support for ST Timekeeper RAM

These operations are supported:

Erase device (flash/EEPROM only - for SRAM, it writes $00 over the entire address range)
Read from device
Write to device
Verify data written to device
Test device (SRAM/NVRAM only - checks that all memory cells are OK using exhaustive testing)

The following limitations exist which cannot be solved by firmware enhancements:

Chips requiring a 12V programming voltage are not supported by this programmer so no EPROM support (but 5V EEPROM/FLASH is fine). If I need to program chips like that later I will design a new programmer.
Dual port RAM chips are not supported as they do not follow the normal JEDEC standard pinout used for single port RAM.
Only 8-bit wide memory chips (with the exception of serial EEPROMs) are supported.
With the exception of serial EEPROMs, chips with less than 28 pins or more than 32 pins are not supported as the VDD pin will not align with any of the VDD pins of the programmer. In practice this is not a problem as such chips are not used often in modern equipment as far as I can tell.

Why?

Memorybrick was born out of my desire to own a decent 5V DIP flash programmer. I didn't want to spend a rediculous sum on a commercial programmer or try my luck with an RS232 driven cheap programmer from overseas.

I can add any device I want (within the limitations of the hardware) as I need support for them. If I need to support something that the hardware wont allow for, I'll design a newer programmer. Due to the design, there are many potential 8-pin devices that could be programmed including microcontrollers if I desire - due to the fact that the bottom 8 pins in the socket are bi-di data lines and a ground pin.

During prototyping I decided it would be nice if the device could also test SRAM chips for me, as I bought a load of used SRAM chips via ebay and wanted to make sure they are OK (due to the price it wouldn't be terrible if a couple were damaged, but I wanted to make sure I didn't use a damaged one in a device). This is a handy feature to have in general when troubleshooting!

Version 1

Version 1 of memorybrick works but is very cumbersome. Jumpers had to be set to select FLASH or RAM chips, it didn't work properly with chips requiring a VCC above 4.7V and it was very slow. These limitations exist due to the small board space, lack of I/O pins, bugs in the microchip CDC USB stack and the fact that the device is bus powered.

I am retiring the first version design as unworkable.

Version 2

I am currently designing a new version of memorybrick. I am using an FTDI FT232R USB UART for USB connectivity in D2XX mode (no virtual com port exposed to the OS) talking to a PIC18F4550 via a fast serial link. This design is self powered which should allow a wider variety of devices to be programmed.

How does it work?

Within the range of the device sizes supported by memorybrick, there are 3 possible places for the chip to draw VDD in the socket (if chips are inserted aligned against the bottom). Because one of these is shared with an address line in smaller chips a couple of transistors are used to switch that pin between an address line and a power supply source.

Serial EEPROMs are supplied power from one of the bi-directional data lines. If that turns out to be a problem I'll need to cram another couple of transistors onto the PCB somewhere.

The address lines are driven by 3 serial-in parallel-out shift registers, which are clocked at high speed by the PIC. This was the most economical way to expand the I/O of the PIC without resorting to an expensive large PIC microcontroller. As the PIC is running at 48mhz (using the PLL) this is not a problem at all.

Most of the work is handled by the firmware in the PIC - the PC just sends basic configuration commands and sends/receives packets of data containing data read from/written to the device in the ZIF socket.

The 6 pin header on the bottom left of the board is for connecting to the PICkit 2 programmer to upload new firmware to the PIC without having to remove it from the socket.

Software

This is a very early screenshot of the software. It is currently undergoing a rewrite.